Advances in semiconductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a result, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple hardware threads, multiple cores, multiple devices, and/or complete systems on individual integrated circuits. Additionally, as the density of integrated circuits has grown, the power requirements for computing systems (from embedded systems to servers) have also escalated. Furthermore, software inefficiencies, and its requirements of hardware, have also caused an increase in computing device energy consumption. In fact, some studies indicate that computing devices consume a sizeable percentage of the entire electricity supply for a country, such as the United States of America. As a result, there is a vital need for energy efficiency and conservation associated with integrated circuits. These needs will increase as servers, desktop computers, notebooks, ultrabooks, tablets, mobile phones, processors, embedded systems, etc. become even more prevalent (from inclusion in the typical computer, automobiles, and televisions to biotechnology).
In many computing environments, it is an established fact that for much of the time, computing systems such as servers are operating well below their peak performance level. During these periods of low utilization the focus is on saving as much power as possible in order to reduce the energy costs. Power management technologies can deliver significant power savings during periods of low utilization. However any power management technology involves a power/performance tradeoff.
Due to increasing integration, many processors can include power management technologies which can control up ⅔ rds of total platform power. In many cases these technologies are controlled by a power control unit (PCU) in the processor. Each power management feature is specifically tuned in design to achieve an optimal power/performance tradeoff. At the time of tuning, there is little knowledge of the actual workload and usage pattern for the system in the field. Given this lack of knowledge, the tuning process is conservative and is necessarily biased towards losing as little performance as possible. This approach prevents significant power savings for an end user who is willing to tolerate more performance loss in return for power savings.
Thus typically power management features are statically tuned to tolerate very little performance loss. This results in several negative downsides. First, at low utilizations where an end user can tolerate high performance loss, available power savings are not realized. Second, an end user typically has no choice regarding power/performance tradeoffs, other than default profiles provided by an operating system (OS). Given the complexity involved in tuning power management features, end users rarely venture into tuning individual features for their target usage, and thus the potential benefit of the features are often not realized.